Integrated circuits are made by forming one or more layers of conductive material on a substrate, such as silicon. When more than one layer of conductive material is used, those layers are separated by a layer or layers of insulating material. Vias may be etched through the insulating layers, which can be filled with a conducting material to form an electrical connection between the separated conductive layers.
A commonly used insulating material is silicon dioxide. Although a thermally stable and mechanically strong material, silicon dioxide has a relatively high dielectric constant of about 4. The relatively high capacitance associated with forming a silicon dioxide layer between a conductive layer's conductive elements may cause undesirable cross talk and RC delay--especially in devices that include narrow trenches to separate the conductive elements.
As described in U.S. Pat. No. 5,886,410 (assigned to this application's assignee), certain materials that have a dielectric constant which is lower than silicon dioxide's may be used as insulating materials. Such materials can be used to fill the trenches that separate conductive elements. Although such materials can improve certain interconnect characteristics, they may be consumed when exposed to certain solvents or plasmas. Consequently, although such materials should work well for landed vias, they may not be used with unbalanced, i.e., unlanded, vias when exposed to O.sub.2 containing plasma or certain solvents during via clean and photoresist ashing steps.
Because it may be desirable to allow for the use of unlanded vias, especially when making integrated circuits having very thin metal lines, there is a need for an integrated circuit that includes a dielectric material having a low dielectric constant that will not erode or dissolve during photoresist removal or via clean steps.
There is likewise a need for a process for making semiconductors that include unlanded vias that uses a dielectric layer having a low dielectric constant, which will not be consumed during the photoresist removal and via clean steps.